In parallel to miniaturization of a device, a gate insulation film of a transistor has been required to have an excellent switching performance and a high amplification factor. For this purpose, by narrowing a thickness of a silicon oxide film serving as a gate insulation film, an electric capacity thereof is increased so that an amount of dielectric charge thereof is increased.
However, when the thickness of the silicon oxide film is narrowed, an amount of leak current is increased. In consideration thereof, instead of the silicon oxide film, use of a high-dielectric-constant film, such as a hafnium silicon oxynitride film (HfSiON) containing hafnium (Hf), has been under review. In this type of high-dielectric-constant film, even when it has a large thickness, an amount of dielectric charges can be increased. As a result, an amount of leak current can be restrained. However, when this type of high-dielectric-constant film is used as a gate insulation film, a problem such as a carrier fixation and/or a gate depletion may occur, which raises a threshold voltage in a transistor.
In order to solve the above problem such as the carrier fixation and the gate depletion, it has been under review that, for example, a metal gate film made of a metal or a metal compound is interposed between the aforementioned HfSiON film and a polysilicon film that has been used as a gate electrode heretofore. Herein, when metal gate films are applied to both a p-type transistor and an n-type transistor in one substrate, the metal gate films for the respective transistors have to be made of different materials, which complicates a manufacturing process. Thus, use of a transistor structure in which such a metal gate film is applied only to a p-type transistor has been under review, because increase in a threshold voltage tends to be relatively larger in the p-type transistor.
FIG. 6A shows an example of such a structure. As shown in FIG. 6A, a substrate 100 includes, at a plurality of locations, layer structure parts 101 for forming p-type transistors and layer structure parts 102 for forming n-type transistors, which are spaced apart from each other.
In the layer structure part 101 for forming a p-type transistor, an n-type silicon layer 103, a high-dielectric-constant film such as an HfSiON film 104 functioning as a gate insulation film 113, a metal gate film 105 made of, e.g., TiN (titanium nitride), a polysilicon film 106, and a photoresist mask 108, are laminated in this order from below. The metal gate film 105 and the polysilicon film 106 are the films constituting a gate electrode 107.
On the other hand, in the layer structure part 102 for forming an n-type transistor, a p-type silicon layer 110, a silicon oxide film 111 functioning as a gate insulation film 113, a polysilicon film 112 functioning as a gate electrode 107, and a photoresist mask 108, are laminated in this order from below.
In the substrate 100 having the above structure, in order to form an area into which a field insulation film is to be buried by a plasma etching process, there are performed a step in which the films (the metal gate film 105, the polysilicon film 106, and the polysilicon film 112) located above the gate insulation films 113 (the HfSiON film 104 and the silicon oxide film 111) are etched, and then a step in which the gate insulation films 113 are etched.
In the former etching step, since the metal gate film 105 and the polysilicon film 112 are side-by-side arranged, a process gas that is capable of simultaneously etching these films, such as a chlorinated etching gas, has to be used. The use of such a chlorinated etching gas significantly decreases a selection ratio of the polysilicon film 112 relative to the silicon oxide film 111. Thus, in order to restrain a local film-thickness-decrease of the silicon oxide film 111, it is necessary that the first etching process is adjusted such that the polysilicon film 112 remains when the etching process of the metal gate film 105 is finished, i.e., when the HfSiON film 104 is exposed, and also it is necessary that the polysilicon film 112 is etched by means of a process gas that is capable of achieving a large (high) selection ratio between the polysilicon film 112 and the silicon oxide film 111, such as a hydrogen bromide gas.
However, when a chlorinated gas is used, it is impossible to achieve a large selection ratio of the metal gate film 105 relative to the polysilicon film 112. When the process conditions for the etching process are adjusted so as to achieve a large selection ratio, as shown in FIG. 6B, a verticality of the etching process is likely to be deteriorated. On the other hand, when the process conditions for the etching process are adjusted so as to achieve a suitable verticality of the etching process, a selection ratio between the metal gate film 105 and the polysilicon film 112 is made smaller. That is, as shown in FIG. 6C, the silicon oxide film 111, for example, is also etched, whereby the thickness of the gate insulation film 113 is locally made thinner.
As described above, there is a trade-off relationship between the shape of the gate electrode 107 and the selection ratio. Therefore, adjustment range of the process conditions for achieving the large selection ratio is considerably narrow, and thus it is difficult to achieve the large selection ratio in practice.
Patent Document 1 (JP2004-149881A (particularly paragraphs 0034 and 0035)), Patent Document 2 (JP2006-332555A (particularly paragraphs 0032 to 0042)) and Patent Document 3 (JP2007-5696A (particularly paragraphs 0051 to 0054)) respectively describe that a substrate is processed by supplying a nitrogen plasma. However, the above problems are not considered at all.